After you have your Qsys design ready, you need to move onto defining your top level module. This is nothing but the hardware description or how I like to visualize it is, connecting the hardware peripherals with the software design (from Qsys).
*For the previous steps refer to older posts.*
I will be using the same example I used in the previous post (#3) that is:
AIM: To display “Hello World” on the LCD display using Nios II processor.
Before we proceed with coding of the top level design, let us get over with ‘Pin Assignments’. In he Quartus window, go to Assignments -> Import Assignments.
Now, to choose the pin assignment file you need the CD that came with the Altera development board. Browse within the CD and search for a file with extension .csv (usually).
Once you’ve assigned Pins, go back to the Quartus Window and again under Assignments go to Assignment Editor. A new Assignment Editor tab should open. For now, leave it open as we will be referring to this later.
So, firstly, create a new VHDL file. (File>>New>>Design>>VHDL File)
Now, the HDL Example from Qsys must be included here. Then build the rest of your code around this.
When defining your entity, refer to the pins in the Assignment Editor.
Architecture is the place you define the connections between the software and hardware components. (See Example code below).
Note: Update to the Qsys design. I have now also included SDRAM (see image below). I had to add this as on-chip memory is insufficient for most of the processing (further steps). Make sure you change the Reset Vector Memory & Exception Vector Memory (of the Nios processor) to SDRAM.
VHDL code is as below:
WARNING: The variables in VHDL code here depend on the names assigned in the Qsys design. Please make the changes accordingly. Also, the development board I am using is Cyclone IV EP4CE115F. The pin names may change with boards.
After you write this, an important step before you hit Compile:
Go to Project>> Add/Remove Files in Project
Browse for <your_filename>.qip file and add it to the project. (In the project folder, it is usually under synthesis). For some reason this file is not automatically read during compilation and you may get errors.
Wait for the compilation process to complete, which usually takes a couple of minutes depending on your project.
When you see compilation successful, it is ready to transfer the design onto the development board!
Next post: Using Quartus Programmer